Direct, robust, and high-resolution patterning methods are needed to downscale the lateral size of two-dimensional materials to observe new properties and optimize the overall processing of these materials. In this work, we report a fabrication process where the initial microchannel of a few-layer WSe2
field-effect transistor is treated by oxygen plasma to form a self-limited oxide layer on top of the flake. This thin oxide layer has a double role here. First, it induces the so-called p-doping effect in the device. Second, it enables the fabrication of oxide nanoribbons with controlled width and depth by oxidation scanning probe lithography (o-SPL). After the removal of the oxides by deionized H2
O etching, a nanoribbon-based field-effect transistor is produced. Oxidation SPL is a direct writing technique that minimizes the use of resists and lithographic steps. We have applied this process to fabricate a 5 nm thick WSe2
field-effect transistor, where the channel consists in an array of 5 parallel 350 nm half-pitch nanoribbons. The electrical measurements show that the device presents an improved conduction level compared to the starting thin-layer transistor and a positive threshold voltage shift associated to the p-doping treatment. The method enables to pattern devices with sub-50 nm feature sizes. We have patterned an array of 10 oxide nanowires with 36 nm half-pitch by oxidation SPL.
ACS Appl. Mater. Interfaces